Apple A11 APL1W72 TSMC 10FF Imaging of Transition DDR I/O Region Standard Cell Essentials

Availability

Published

Product Code

SCE-1710-803

Release Date

06/04/2018

Product Item Code

APP-APL1W72

Device Manufacturer

Apple

Device Type

Applications Processor

Subscription

Compute

Channel

Logic - SoC Design Analysis (IP)

Logic - SoC Design Analysis

Apple A11 APL1W72 TSMC 10FF Imaging of Transition DDR I/O Region Standard Cell Essentials

This project presents a Standard Cell Essentials analysis of the Apple A11 APL1W72 DDR I/O region. It is a collection of SEM montage images showing the transition between an I/O IP block and a digital logic block, showcasing the relationship to
system-on-chip (SoC) design rules used on the Apple A11 APL1W72.

The report contains the following detailed information:

Downstream product features and SoC-level areas of analysis
Technology node contact and back-end-of-line (BEOL) process architecture assessment with stack up dimensions
Features and dummy structures of the system-on-chip (SoC) design overhead associated with the transition between design IP blocks
Scanning electron microscope (SEM) montage image of the analyzed bevel areas delivered in ICWorks Browser or CircuitVision
Target areas are typically transitions between different types of IP blocks, such as analog I/O to digital, or to memory, and typically contain many dummy features

Related Analysis	Manufacturer	Analysis Type	Subscription Channel
Qualcomm Snapdragon 888 A78 CPU SoC Design Analysis	Qualcomm	Process	Logic - SoC Design Analysis, Logic - SoC Design Analysis (IP)
Qualcomm SM8350 Snapdragon 888 Samsung 5 nm LPE CPU (X1) SoC Design Analysis	Qualcomm	Process	Logic - SoC Design Analysis, Logic - SoC Design Analysis (IP)
Ambarella CV22 SoC Digital Floorplan Analysis	Ambarella	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
NVIDIA Ampere GA100 7 nm GPU Digital Floorplan Analysis	nVIDIA	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
Broadcom BCM56880 Trident 4 TSMC N7HPC Process Digital Floorplan Analysis	Broadcom	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
Intel Xe GPU DG1 Digital Floorplan Analysis	Intel	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
Samsung Exynos 2100 5 nm FinFET Process Digital Floorplan Analysis	Samsung	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
AMD Ryzen 9 5950X TSMC N7 HPC FinFET Process Digital Floorplan Analysis	AMD	Floorplan	Logic - Digital Floorplan, Logic - Digital Floorplan (IP)
Qualcomm Snapdragon 888 Samsung 5LPE Process aCMOS Essentials	Qualcomm	Process	Logic - Process, Logic - Process (IP)
NVIDIA Ampere GA102 GPU Samsung 8N FinFET Process Digital Floorplan Analysis	nVIDIA	Floorplan	Logic - Digital Floorplan (IP), Logic - Digital Floorplan