Availability
Published
Product Code
FAR-1804-803
Release Date
Product Item Code
MED-MT6771V
Device Manufacturer
MediaTek
Device Type
Baseband Processor
Subscription
Compute
Channel
Logic - Digital Floorplan (IP)
Logic - Digital Floorplan
MediaTek MT6771V Helio P60 Digital Functional Analysis
This report presents a Digital Functional Analysis of the MediaTek MT6771V Helio P60 chipset’s AM10788B die, found inside the OPPO PACM00 R15 smartphone. The MediaTek MT6771V Helio P60 chipset, manufactured using state of the art finFET CMOS process, features major functional blocks including two image signal processors (ISPs), modem logic block, the graphics processing unit (GPU), quad-core ARM Cortex-A73 quad-core ARM Cortex-A5, LPDDR interface, LPDDR control logic, and analog portions composed of a radio frequency (RF) interface, a USB, two camera/display interfaces, a Bluetooth interface, and several phase-locked loop (PLLs).

This report contains the following detailed information:
  • Selected teardown photographs, package photographs, package X-rays, die markings, and die photographs
  • Scanning electron microscopy (SEM) plan-view micrographs showing the layout of the die at the levels including, fin/shallow trench isolation (STI), gate, contacts, and minimum pitch metals
  • Measurements of horizontal dimensions of some of the major layout features, particularly the pitch and track height of standard cells
  • Plan-view optical micrograph of the die delayered to the metal gate level
  • Identification of major functional blocks on a gate level die photograph
  • Table of functional block sizes and percentage die utilization
  • High-resolution top metal and gate level die photographs delivered in ICWorks Browser
 

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