The Advanced CMOS Essentials (ACE) for logic devices deliverable includes concise analyst’s summary of critical device metrics and salient features supported by the following image folders:
Downstream product teardown, package photographs and X-rays
Top metal and poly die photographs
SEM bevel through logic region and SRAM
SEM cross section of the general device structure, metals, dielectrics, and detail of the FEOL structures
TEM cross section, orthogonal to the transistor gate fingers, showing the lower metals and dielectrics, transistor gates (NMOS and PMOS), isolation, and other FEOL features
The results of TEM-EDS analyses are included in the ACE summary document.