Supporting IP strategy in the semiconductor industry Growing complexity of the chip market has made it harder than ever for intellectual property owners to monitor developments, making reverse engineering a crucial process The breadth of reverse engineering required to innovate, protect and monetise
A deep dive into the major components used in the light detection and ranging technology. Posted in Electronics360.
So far, NAND Flash has shown a white-hot stage. Not long ago, storage vendors were still "seeing the scenery on the high platform of flash memory" with 128 layers.
How SEMulator3D can be used to study micro loading and manufacturing variability in an advanced DRAM process that exhibits a wiggling AA profile.
The evolutionary history of the iPhone camera can also be seen as the history of the development of the phone CIS, even if the iPhone does not fully follow the CIS technology trends to advance. Just take this opportunity, but also through the last two articles to review the modern mobile phone
Semiconductor Engineering - Various memories and business outlooks are all over the map, sometimes literally, with lots of confusion ahead.
Some say that in the H2 2017 – H1 2018 timeframe Intel’s 10nm node were so half baked, that Intel had to significantly redesign its 10 nm process technology for subsequent products. In any case, one SKU and limited availability speak for themselves.
Quand on dit ce mois-ci, c’est à l’occasion de la Conférence des développeurs qui se tiendra dans la semaine du 22 juin, un événement très important appelé WWDC ou Worldwide Developers Conference qui se tient en Californie, à San José ou à San Francisco selon les années.
Like many other businesses, the Japanese heavyweight is under significant financial pressure thanks to the covid-19 pandemic, but its long track record of leveraging its IP assets could prove a saving grace
With waveform and protocol testing essential to investigating memory technology patents for evidence of use, TechInsights’ Martin Bijman and Neil MacLeod take a closer look at the portfolios of the top NAND patent owners to determine how different types of analysis can support different types of
A look inside YMTC’s second-generation 3D-NAND technology, which uses “Xtacking” to bond the peripheral circuitry face-to-face with the memory array instead of alongside. As first published in Semiconductor Digest.