This process analysis report examines the TF-SAW filter die, marked 122B050-A1, located in the 90SSPNWAM mid-high band power amplifier with an integrated low noise amplifier and duplexer (MHB L-PAMiD) within the Huawei Nova 12 Pro (ADA-AL00) 5G smartphone.

This report provides an analysis of the standard cells comprising about 70% of the area analyzed in the logic block of the Apple A17 Pro SoC CPU. Standard cells schematics are extracted to determine routing efficiency, gate density and global metal usage survey.

The HiSilicon Hi1105GFCV100 WiFi/BT/GNSS SoC was fabricated using HLMC’s 28nm HKMG planar RF CMOS process. The report includes a summary of key findings, and a detailed look at the FEOL, MOL and BEOL structures and materials used. Extensive SEM, TEM and materials analysis provide a complete look at how this device was manufactured.

This blog compares Samsung’s S6565 and S6566 Wi-Fi 6/BT 5.3/FM SoCs based on the published floorplan and RF architecture analyses. Special attention is given to the die area consumption by the RF sections. Some conclusions are offered based on specific layout changes.

This blog compares Samsung’s S6565 and S6566 Wi-Fi 6/BT 5.3/FM SoCs based on the published floorplan and RF architecture analyses. Special attention is given to the die area consumption by the RF sections. Some conclusions are offered based on specific layout changes.

Global smartwatch revenues shrunk by 1.5% in Q1 2024 due to declining shipment volumes as well as shrinking ASPs caused by macroeconomic weakness and geopolitical uncertainty limiting consumer demand and discretionary spending.

TechInsights has compiled quarterly financial data for a sampling of Tier 1s important to the automotive industry. All companies selected are public (private companies were not included). Total company revenues (including possibly non-automotive sales if applicable) are listed along with Gross Margins and Operating Margins.

TechInsights' report on HBM and Verticality evaluates the impact of High Bandwidth Memory on DRAM die stacking within single accelerator cards as well as how fabs and the supply chain are reacting to this trend.

The Nordic nRF54L15 Bluetooth 5.4 Systems-on-Chip (SoC), the first SoC in the nRF54L series which begins sampling in October 2023, features a 128 MHz Arm Cortex-M33 processor, 1.5 MB (equivalent of 12 Mb) of non-volatile memory (NVM) and 256 KB of RAM. The Nordic TMRC83 die is fabricated using TSMC 22 nm ultra-low leakage (22ULL) with embedded resistive random-access memory (eReRAM) process.

The Qualcomm Snapdragon XR2 Gen 2 SXR2230P-100-AB (HG11-355514-1) found in the Meta Quest 3 Mixed Reality VR Headset, using Samsung 4nm (4LPX) FInFET high-k metal gate (HKMG) CMOS process. The application processor features Qualcomm Kyro-CPU and Adreno GPU, and LPDDR5x memory controller interfaces to support next-generation MR and VR for all. Explore this digital floorplan analysis (DFR) to find out the process node, BEOL stack, bit cell usage, and manufacturing cost deeply.

Enterprises are demanding cheaper resources and more AI technology. Cloud providers are struggling to meet these demands using third-party CPU and accelerators vendors which control the supply, cost-base and product definition. To regain control of the main attributes of cloud - scalability and innovation - cloud providers must produce their own silicon.

Hyperscalers and CSPs could have purchased accelerators from Nvidia, AMD, Intel, or numerous start-ups building accelerator products. Better yet, they could have even purchased one of these start-ups. Yet they invested in their accelerator solution. What was their motivation? Why did the hyperscalers and CSPs go through the trouble of building their accelerators?