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Latest Blogs and Commentary
OpenAI Jalapeño: The Architectural Decisions Behind Its Inference Efficiency
OpenAI Jalapeño's benchmark results have attracted attention, and a closer look at the design choices provides important context for understanding the performance. This article presents TechInsights’ commentary on the decisions disclosed at Hot Chips.
What a Die-level Analysis Reveals About Apple's M5 Pro GPU Design
When Apple announced the processor, much of the discussion focused on how the two dies were connected and the role of TSMC's SoIC-X face-to-face (F2F) hybrid bonding technology. The next question is how Apple laid out the GPU die, which we examined in our latest Digital Floorplan Quick Look (DFQ).
The Chip Insider®– Risk of an AI Bubble
Inside G. Dan Hutcheson’s latest analysis, he explains why the AI boom bears all the hallmarks of a bubble, tracing its unprecedented rise from millions to over $100 billion and exploring how lasting value is created long after market speculation fades.
Don’t Let Carbon Compliance Cost You Customers: The New Rules for Semiconductor Supply Chains
Accurate carbon reporting is now required across the semiconductor supply chain. Learn how to build an auditable data strategy to maintain your market position.
HiSilicon Kirin 9030 Pro Process Flow Analysis: How Does SMIC’s N+3 Process Compare to Leading-Edge Nodes?
How does SMIC N+3 compare with other leading-edge nodes? A process flow analysis of the Kirin 9030 Pro provides the measured layer-by-layer evidence.
Intel Core Ultra X7 358H Microprocessor: Evaluating the Foveros-S 2.5D packaging technology
The Intel Core Ultra X7 358H combines three active tiles in a single Foveros-S 2.5D package. TechInsights’ Advanced Packaging Quick Look documents how Intel implemented the package, including its materials, interconnects, and structural design.
Co-Packaged Optics (CPO): Mapping the Market and Supply Chain Ecosystem Behind AI Datacenters
Who is positioned to compete as co-packaged optics (CPO) scale? TechInsights maps the market, supply chain, critical bottlenecks, and vendor landscape.
US Hyperscalers Now Drive 15 of the World’s Top 20 Datacenter Markets
Where are hyperscalers concentrating datacenter capacity? Q1 2026 data shows why 15 of the top 20 markets are in the US and which cloud providers lead.
High Bandwidth Memory in NVIDIA HGX B300: Examining the Micron HBM3E Package
Memory packaging has become a primary differentiator in AI accelerator performance. We take a look at Micron's HBM3E packaging architecture for the NVIDIA HGX B300.
The Chip Insider®– Can’t forecast? Here’s why. SMIC's shocker
Inside G. Dan Hutcheson’s latest analysis, rapid changes in AI and the global chip industry are making market forecasts increasingly difficult.
Why the Advanced Packaging Semiconductor Market No Longer Moves as One
Advanced packaging does not move as a single market. See why packaging strategy increasingly depends on workload and application-based market data rather than on a single-processor view.
The Chip Insider®– Why Test is Outpacing WFE
Inside G. Dan Hutcheson’s latest analysis, the AI-driven shift from consumer electronics to advanced computing reveals why semiconductor test is outpacing WFE and reshaping industry economics.
Google Pixel 11 Analysis | Upcoming Teardown
Every Pixel launch resets expectations for the rest of the Android market. Get the full Pixel 10 teardown now and see the BOM, component sourcing, and design choices the Pixel 11 must top.
Snapdragon X2 Elite Extreme Advanced Packaging Analysis: Examining Qualcomm’s SiP Approach
Compared with the previous-generation Snapdragon X Elite, Qualcomm has changed how the system-on-chip (SoC) is packaged. TechInsights performed an advanced packaging analysis to understand Qualcomm's latest packaging approach.
How China Is Closing the RF Front-End Acoustic Wave Filter Gap
See how China's RF front-end industry is advancing acoustic wave filter capabilities and what TechInsights' analysis reveals about OnMicro's capabilities.
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