SK Hynix 128L 3D NAND Memory Design Periphery - NAND

Product Code

MDP-2008-801

Release Date

09/12/2020

Availability

Published

Product Item Code

HYN-H25T2TB88E

Device Manufacturer

Hynix

Device Type

NAND Flash

Subscription

Memory - NAND & DRAM

Channel

Memory - NAND Peripheral Design

SK Hynix 128L 3D NAND Memory Design Periphery - NAND

The following is a Memory Peripheral Design Analysis on the SK Hynix H25T2TB88E 128-layer 3D NAND flash memory. This device is a TLC NAND memory based on a charge trap flash (CTF) design with a peripheral circuits under cells (PUC) architecture. The SK Hynix H25T2TB88E uses data strobe (DQS) signals to provide a hardware method for synchronizing data DQ in the NV-DDR2/NVDDR3 interface.

View Table of Contents

Related Analysis	Manufacturer	Analysis Type	Subscription Channel
Intel 144L QLC 1Tb 3D NAND Memory Peripheral Design	Intel	Circuit	Memory - NAND Peripheral Design
Intel 144L QLC 1Tb 3D NAND Advanced Memory Essentials	Intel	Process	Memory - Process
Samsung K4C8E1K6MX 2nd Gen. 8 Gb HBM2 DRAM Memory Floorplan Analysis	Samsung	Floorplan	Memory - DRAM Floorplan Analysis
Intel 29F08T2A0CQK1 144L 3D NAND Memory Floorplan Analysis	Intel	Floorplan	Memory - NAND Floorplan Analysis
Samsung 128L 512 Gb TLC die Memory Floorplan Analysis	Samsung	Floorplan	Memory - NAND Floorplan Analysis
Internal Waveform Overview of the Intel 1 Tb 144L QLC 3D NAND	Intel	Other	Memory - NAND Internal Waveform Overview
Micron Gen2 1y nm 8 Gb GDDR6 Memory Floorplan Analysis	Micron Technology	Floorplan	Memory - DRAM Floorplan Analysis
Samsung 12 Gb 1z EUV LPDDR5 Advanced Memory Essentials	Samsung	Process	Memory - Process
Internal Waveform Overview of the Samsung 92L QLC 3D NAND	Samsung	System	Memory - NAND Internal Waveform Overview
Samsung 1x nm 4 Gb LPDDR4X Memory Floorplan Analysis	Samsung	Floorplan	Memory - DRAM Floorplan Analysis