TechInsights Critical Subsystems Driving Forces Update on Platform Updated files include the following: Driving Forces Device Forecast Summary History and Forecast for PV Revenues, Unit Shipments, and ASPs Substrate Processing Equipment Forecasts History and Forecast for Semiconductor, FPD, PV

Cycle Mapping and Upturn Timing G. Dan Hutcheson The Chip Insider® Cycle Mapping 2022-2023: 6-months into the slowdown, quarterly and December’s results – in particular – have revealed how this slowdown resembles previous cycles. Some believe it must be a deep one, similar to the apocalyptic ones

Semiconductor WEEK: An overview of results and conclusions from recent reports at TechInsights.

TechInsights' Semiconductor Analytics report

Caution prevails as dark clouds linger Shereen Vaux Order activity for semiconductor equipment dropped to a chilly 48 SOC Mobile and Digital Consumers dropped a degree in cool conditions Memory activity is stuck at freezing levels Many Semiconductor companies have been reporting elevated inventory

At the end of Part 2 of the blog we had reached 2009 and the 40-nm generation; which put TSMC out of sync with other companies, who were marketing their 45-nm product. That discrepancy continued with the usual 70% shrink to the next node, 28-nm for TSMC and 32-nm for IDMs such as Intel and IBM.

AMD’s MI300 accelerator will compete with Nvidia's Grace Hopper in the HPC and AI markets. It uses AMD's third-generation CDNA3 architecture and features x86, GPU, and memory die in a single package for improved performance.

Qualcomm’s Ride Flex SoC combines ADAS and cockpit applications, integrating workloads that have no safety criticality with those requiring ASIL B and ASIL D safety.

TSMC presented papers at IEDM detailing its 3nm N3 and N3E processes. N3 reduces CPP by 6nm compared with N5. SRAM cells are no smaller in N3E than in N5.

Recently, TechInsights hosted a Memory webinar where Dr. Jeongdong Choe, Senior Technical Fellow at TechInsights, discussed the latest memory technology trends and challenges for DRAM and NAND devices.