The Chip Insider®–The New Intel Trinity. Hi-NA too expensive? The TSMC controversy and the inside story.

Summary:

The New Intel Trinity: In its first quarter 2026 earnings call, Intel pulled 4 aces out of the deck. They beat analyst estimates on top and bottom lines, while doubling down with revenue and earnings guidance beats. The question: Is Intel firing on all cylinders again, or is this a one-hit wonder?

The earnings beat came from both the demand side and the supply side. On the demand side, the CPU shortage drove customers to buy more down-binned parts. Intel has binned lots since the 1980s… This is fab economics 1A… So, earnings rise. On the supply side, yields were up, which one pundit claimed was from selling binned parts off the edge of the wafer, calling it “yield salvage.” His comments are not wrong. Just not wholly right... Graduate level fab economics: Yield distributions are heteroscedastic… Actually, Intel’s yield management efforts have improved yield…

What’s notable… it signals a significant improvement in operational efficiency coming from the management changes since Lip Bu Tan became CEO a little over a year ago… and one month later, appointing Naga Chandrasekaran Chief Technology and Operations Officer and EVP of Intel Foundry Technology and Manufacturing. Lip Bu’s management style is… In this earnings call, the results were clear.

There's a new Intel Trinity of Lip Bu Tan, Dave Zinsner, and Naga Chandrasekaran. The original Intel Trinity… made up of Robert Noyce, Gordon Moore, and Andy Grove… Today’s three are clearly acting as a team. Lip Bu is converting relationships into partnerships and revenue by building trust, while bringing financial discipline and operational focus. Naga is converting execution at speed into learning and yield. Dave is healing the financial and decision mistakes of the past into profitability.

Hi-NA too expensive? The TSMC controversy and the inside story.

Kevin Zhang’s recent answer to Andrea Lati’s question regarding when TSMC would adopt ASML’s Hi-NA EUV tool created a great controversy… He did not elaborate on anything other than the price being over $400M, which is roughly twice the price of Lo-NA EUV, which is roughly twice the price of 193i. Doubling the price of each new lithography technology is a trend that started in the 80s. It’s a simple function of Moore’s Law, as I have pointed out many times in the past here and in my 2018 SPIE ALP plenary. When a lithography tool doubles the density on a chip, its value is twice what it was before. Hence, the doubling of the price. You can be sure that ASML has made these pricing calculations very carefully.

Now is Hi-NA really too expensive, when the installed outlay for a Lo-EUV is around $200M? And if so, why did Kevin say they had no plans to introduce it before 2029?… With double patterning, the cost of a Lo-NA tool set is the same as a Hi-NA, because one needs two Lo-NA tools to do the same job as a Hi-NA tool. So, there’s little difference in price for accomplishing the same job. Though two tools will have higher COO and double patterning will have lower yields.

And if being too expensive was the case, why are the DRAM makers going to Hi-NA EUV? DRAMs are the most cost-sensitive chips. And what about Intel? The important clue here is 2029.

2029 is the expected date for ASML to have a larger reticle that will fit an equivalent field size to the current stand. As mentioned in previous Chip Insiders, current AI and other chip designers requiring a full field have revolted against Hi-NA EUV due to its half-field anamorphic lens. Stitching lowers… TSMC hates to talk about customers, so the easier explanation is “it’s too expensive!” It certainly is pricey. But you don’t get Ferraris for Toyota prices.

“If you don’t like what’s being said, change the conversation”
— Don Draper, Mad Men