Webinar: Memory Technology 2020 and Beyond - NAND, DRAM, Emerging and Embedded Memory Technology Trends

 
TechInsights

Memory Technology 2020 and Beyond

NAND, DRAM, Emerging and Embedded Memory Technology Trends

This webinar was presented by TechInsights

In this webinar, Dr. Jeongdong Choe will present his detailed review of the latest NAND, DRAM, emerging and embedded memory technologies, summarized from reverse engineering analysis compiled by TechInsights.

This presentation includes side-by-side comparisons of generations of memory technologies, and in-depth discussion on the latest developments, including:

  • DRAM cell scaling down to sub-12 nm with EUV adoption for DRAM cell patterning
  • Graphic DRAM and high bandwidth memories such as GDDR6(X) and HMB2(E)
  • The race to increase the number of vertical 3D NAND gates from manufacturers Samsung, SK Hynix, KIOXIA, Western Digital, Intel/Micron
  • An examination of 147-Layer technology from SK Hynix
  • Intel’s extension of XPoint for SSD and Intel Optane Persistent Memory
This presentation also includes discussion of TechInsights’ famed DRAM, NAND, Emerging and Embedded Memory roadmaps, which are developed by Jeongdong Choe.

This webinar provides access to content we typically reserve for subscribers.

 

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Webinar Outline.

In this webinar, Dr. Jeongdong Choe will present his detailed review of the latest DRAM, NAND, emerging and embedded memory technologies, summarized from reverse engineering analysis compiled by TechInsights.

The following sections provide an overview of the topics that will be discussed.

DRAM

DRAM cell scaling down to 15 nm design rule (D/R) and beyond has already been productized by major DRAM players such as Samsung, Micron and SK hynix. Now, they are developing n+1 and n+2 generations so-called 1a (or 1α) and 1b (or 1β), which means DRAM cell D/R might be able to further scale down to sub-12 nm with EUV adoption for DRAM cell patterning. Cell design scaling down is getting slower due to patterning, leakage and sensing margin challenges.

Graphic DRAM and high bandwidth memories such as GDDR6(X) and HBM2(E) adopted 20 nm or 10 nm-class DRAM technology nodes.

Camera modules on smartphones have achieved a triple-die structure by adding a low power DRAM die into the module.

Some innovations such as higher-k dielectric materials, pillar capacitor, recess channel LV transistors and HKMG peripheral transistors can be seen in the advanced DRAM products.

Looking to theDRAM technology trend and R&D roadmap, DRAM scaling down will continue over the next 10+ years.
 

NAND

As major NAND manufacturers race to increase the number of vertical 3D NAND gates, they have all already introduced their own 96L or 128L 3D NAND devices. Samsung 128L V-NAND (V6), KIOXIA and Western Digital Company (WDC) 96L BiCS4, Intel/Micron 96L/128L and 176L FG CuA, and SK hynix 128L 4D NAND PUC products are on the market. We will discuss some of the many innovative changes to come in this space.

Beyond storage density, 3D NAND has been applied to high-speed SSDs, such as Samsung Z-SSD and KIOXIA XL-FLASH with multi-plane for parallelism.

SK hynix has reached 147 vertical gates stacked; we will look at their solution and at Micron’s.
 

Embedded & Emerging

Intel extends XPoint memory application not only for conventional SSD but also Intel Optane Persistent Memory, although Micron’s X100 SSD is only available for Add-in Card (AIC)at this time.

Many of the new pMTJ MRAM products have released from Everspin (3rd generation, 1Gb/chip @28nm), Avalanche/Renesas (40nm) and Samsung/Sony (28FDS). Dialog (previously Adesto) 2nd generation ReRAM (CBRAM) products are also on the market.
 

Roadmaps

Also included in this presentation, TechInsights provides current and future DRAM, NAND and Emerging/Embedded memory technology analysis, trends and roadmaps – content normally reserved for our memory subscribers.
 

Dr. Jeongdong Choe

Dr. Jeongdong Choe

Dr. Jeongdong Choe is a Senior Technical Fellow at TechInsights. He has nearly 30 years of experience in the semiconductor industry, R&D and reverse engineering on DRAM, NAND/NOR FLASH, SRAM/Logic and emerging memory. He worked for SK Hynix and Samsung Electronics for over 20 years. He joined TechInsights and has been focusing on technology analysis on semiconductor process, device and architecture. He has written many articles on memory technology including DRAM technology trend, 2D and 3D NAND process/device integration details, and Emerging memory such as STT-MRAM, XPoint, ReRAM and FeRAM design and architecture. He quarterly produces and updates a widely distributed memory roadmaps on DRAM, NAND and Emerging memory.

 
 
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