The following is a CircuitVision Analysis report on the SK Hynix HFB1A8MQ431A0MR 96-layer 3D NAND flash memory. This device is a TLC NAND memory based on a charge trap flash (CTF) design with a peripheral circuits under cells (PUC) architecture. The report contains a full set of schematics and annotated photographs divided into the following sections:
- Architectural Overview
- Array and Peripherals
- Data and Address Paths
- Control Blocks
- Voltage Generators System
- Test and Configuration Path
- Symbol Definitions
- Major Findings
- Standard Cells
- Appendix A - Signal List