Ambarella has launched the new CV72S, incorporating its third-generation CVflow architecture with a neural-network accelerator and hardware image signal processor. The chip targets high-end security cameras and adds radar support.
Physically unclonable functions (PUFs) create externally inaccessible keys from unique chip characteristics. They can increase security and reduce the cost of provisioning hardware roots of trust.
To drum up revenue, Arm is considering whether to require OEMs to directly license the right to use Arm-based chips in their designs. However, Arm risks affecting its long-term business prospects by appearing capricious and greedy.
Nvidia disclosed more details of its Grace processor, which can combine with its Hopper GPU or run by itself in servers. Now due in 2H23, the Arm-compatible chip is more efficient than Intel’s flagship Xeon.
The Epyc 9004 embedded products, deriving from the Genoa server processor, offer 16 to 96 cores. AMD is generous with cache, DDR5 channels, and PCIe lanes, but it lacks application-specific features.
Graphcore has revealed how it hybrid bonds a deep-trench-capacitor die and AI accelerator, describing manufacturing techniques and a voltage-swing reduction. A Shmoo plot shows how adding the capacitor die can cut power or boost the clock rate.
The new PN7642 is the first fully integrated NFC solution that includes programmability, NFC RF, and security. It implements closed-loop and other non-payment systems.
Marvell’s new Teralynx 10 (TX9180) switch IC delivers throughput of 51.2 Tbps, four times that of Teralynx 7. Separately, the company’s Nova optical DSP is the industry’s first Ethernet PHY to reach 1.6 Tbps.
Part of a radio subsystem, Qualcomm’s Snapdragon X75 modem for 5G simplifies boards by interfacing with a better-integrated RF transceiver. It also increases performance through more AI horsepower, enhanced uplink technology, and denser QAM.
Intel has refreshed its midrange FPGAs, challenging market newcomers. The new family updates the fabric, CPUs, and DSPs while expanding the Agilex line.
Think Silicon is among the few companies developing low-cost, low-power GPU IP, offering cores to accelerate 2D, 2.5D, and 3D graphics. The new Nema Pico VG adds support for vector graphics, enabling slick GUIs.
Trained machine-learning models can be valuable, and techniques have been developed to identify them in case of theft. NXP has introduced a tool that implements a straightforward approach to watermarking image-classification neural networks.
The STM32H5 family updates STMicroelectronics’ high-performance-MCU line with additional security. Installing the new Secure Manager software on the flagship model can yield a complete security suite with no required coding.
Packaging technology goes hand in hand with chiplets. Examples include basic PCB-based 2D structures, passive silicon interposers and bridges for 2.5D packages, 3D packages employing active interposers, and hybrid bonding.
Generative-AI models such as ChatGPT are typically large and run only in the cloud, but Qualcomm recently demonstrated a smaller image-generation model called Stable Diffusion performing inference on a smartphone.
