Alexandra Noguera

Alexandra Noguera is a Senior Logic Analyst at TechInsights where she provides analysis and technical support for competitive intelligence on reverse engineering of advanced CMOS technology nodes, leading SoC design and standard cells/layout analysis, and identifying IP blocks for SoC floorplan. She has a Bachelor’s degree in Electrical Engineering from Carleton University, in Ottawa, Ontario, Canada and 10 years of experience working in semiconductor circuit analysis. Alexandra joined Chipworks (now Techinsights) in 2012. Her principal focus is leading SoC Design Analysis projects involving layout-like analyses extracting standard cell libraries, routing efficiency, power grid, clock tree, etc., across TSMC, Samsung and Intel technologies. She is also actively involved in identifying IP blocks for SoC floorplans, along with estimating gate counts, bit cell density, and standard cell libraries characterization, as well as analysis of circuit layout for translation into schematics, followed by hierarchical representation of circuit schematics focused on analog front ends, digital logic, and memory cells. For the last 3 years she has been responsible for content creation for advanced CMOS logic process, including competitive benchmarking trends and quarterly briefings.