Ceva’s PentaG-RAN is a baseband IP block for cellular infrastructure. Packing multiple fixed-function units and two DSP types, it targets SoCs for RUs, DUs, small cells, and beam-forming chips.

AMD’s new Ryzen Embedded V3000 family addresses networking and storage with the Zen 3 microarchitecture. It features up to eight CPUs but omits GPUs.

Arm’s next Neoverse CPU, code-named Demeter, will appear in Nvidia’s Grace processor in 2023, matching the single-thread performance of mainstream Xeon products for the first time.

Seven years after releasing LiquidSecurity, Marvell has unveiled a second-generation PCIe card that increases RSA throughput by 20% and ECC throughput tenfold.

STMicroelectronics’ new SR6P7x and SR6P6x automotive SoCs aggregate low-level ECUs into domains or zones. With a novel choice of nonvolatile memory for code, the company has a strong focus on deterministic real-time performance.

Nvidia’s newest gaming GPU, code-named Ada Lovelace, builds on the Ampere design with faster clock speeds, far more cores, a massive cache memory, and faster ray tracing.

Having closed its Xilinx acquisition, AMD is launching a new FPGA with much more CPU power than previous members of its Versal family, targeting it at 400Gbps smart NICs.

Intel has expanded its discrete graphics card offering into the low end of the desktop market. It also has two new models for the data center.

After spinning off from SK Telecom, Sapeon has become the first Korean company to deliver an AI chip. The X220 provides an efficient accelerator for both video analysis and language processing.

Zen 4 increases IPC and runs much faster than Zen 3 owing to optimized circuits, a process shrink, bigger buffers, deeper queues, and a larger micro-op cache.

SiFive has entered the automotive market, offering small embedded and application cores for ASIL B and ASIL D systems.

Despite a short design cycle, Intel boosted the performance of its 13th Generation Core processor by up to 15% over the previous generation through higher clock speeds and more “efficiency” cores.