Movellus’s licensable Aeonic Power on-die voltage regulator technology enables dynamic voltage scaling circuity to be integrated in silicon at a core level, enabling fine-grained power control and the creation of virtual power islands around individual cores on the same chip.
Read our latest report on Tenstorrent's Wormhole architecture, covering the n150 and n300 PCIe boards, memory enhancements, performance boosts, and power efficiency. Discover how these innovations are influencing the AI-chip market and what lies ahead.
Ceva’s NeuPro-Nano licensable neural processing unit (NPU) targets processors that run TinyML workloads, offering up to 200 billion operations per second (GOPS) for power-constrained edge IoT devices.
AMD’s latest flagship CPU adds resources and bandwidth for processing vector instructions and promises a significant instructions-per-cycle (IPC) increase of 16% compared with its predecessor, Zen 4.
Intel is on track with its launch of five process nodes in four years—Intel 3 is the third. At the VLSI Symposium we had a good summary of Intel’s last FinFET node. It is now in full production of Xeon 6 processors in both Oregon and Ireland.
From a country known for its software talent, Mindgrove Technologies, a three-year-old design startup, has launched India’s first homegrown commercially available chip.
Intel dominated industry news with Lunar Lake's AI capabilities and efficiency gains, while Raptor Lake devices received a fix for physical degradation; the month also saw major AI tool announcements and RISC-V product launches.
Intel’s Skymont CPU represents a significant evolution of the company’s efficiency cores from the origins of the Atom low-power core to something much closer in performance-per-clock to the company’s recent flagship performance cores.
Intel’s Lion Cove contains significant departures from previous CPU microarchitectures, prioritizing performance efficiency by omitting hyperthreading and other performance-boosting innovations but still manages to deliver a double-digit IPC uplift.
Microsoft’s Copilot+ PC demands saw Qualcomm, Intel and AMD all launch new PC SoCs with advanced NPUs. Intel’s Gaudi 3 will compete with NVIDIA—although only NVIDIA’s previous generation H100. Advanced packaging is a significant industry trend, and AR is a driving force behind new packaging technologies from TSMC seen in the Apple R1, and an experimental SoC from Meta.
Intel’s Lunar Lake, the biggest overhaul of its architecture for PC processors since the addition of efficiency cores with Alder Lake, promises a big leap in power efficiency that may nullify AMD’s long-standing advantage in this metric.
Apple’s R1 sensor hub chip in the Vision Pro AR/VR headset is the first use that TechInsights has seen of TSMC’s InFOM advanced packaging technology. The R1 has a 5nm processor chip plus two LLW DRAMs linked by short very-high-density interconnect to speed up the data processing.
Intel’s Gaudi 3 AI accelerator may not feature the headline performance numbers of NVIDIA’s Blackwell, but is nonetheless a competitive offering on price, power, and inference efficiency.
Interest in Windows on Arm (WoA) is at a high point. Microsoft and Arm must take the opportunity to plug the remaining gaps and create a broader WoA ecosystem.
