Microprocessor Report
For more than 30 years, Microprocessor Report (MPR) has been the industry's go-to source for the latest microprocessor news. This subscriber-only publication covers a broad range of semiconductor topics. We publish an average of three new articles per week, each covering a new product, technology, or trend.
Our core coverage is of processors and SoCs for servers, PCs, supercomputers (HPC), smartphones, wearables, embedded systems, IoT devices, communications and networking equipment, and advanced automotive applications. We also cover licensable and open-source cores for CPU, DSP, graphics, and other functions. Many of our recent articles cover AI accelerators for cloud, edge, automotive, mobile, and IoT.
Deep Insight and In-Depth Analysis
Today's complex SoCs contain a variety of functions beyond the processor, so our coverage extends to wired and wireless communications protocols such as 5G, LTE, Ethernet, Wi-Fi, PON, PCI Express, and InfiniBand. We also cover special-purpose chips such as search engines, fabrics, silicon photonics, FPGAs, PHYs, cellular RF, high-bandwidth memory, and new memories such as Optane and NRAM.
We often write about new companies, new technologies, and new design approaches to keep our subscribers up to date on trends. We are particularly interested in new technologies for SoC design and manufacturing. We also keep an eye on mergers and acquisitions, and we use our in-house market-share data to highlight shifts in the market.
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Microprocessor Report
AMD’s MI300 Targets HPC and AI
AMD’s MI300 accelerator will compete with Nvidia's Grace Hopper in the HPC and AI markets. It uses AMD's third-generation CDNA3 architecture and features x86, GPU, and memory die in a single package for improved performance.
Qualcomm Integrates Cockpit, ADAS
Qualcomm’s Ride Flex SoC combines ADAS and cockpit applications, integrating workloads that have no safety criticality with those requiring ASIL B and ASIL D safety.
TSMC Reveals 3nm Process Details
TSMC presented papers at IEDM detailing its 3nm N3 and N3E processes. N3 reduces CPP by 6nm compared with N5. SRAM cells are no smaller in N3E than in N5.
Imagination DXT GPU Adds ALUs, TPUs
Imagination Technologies’ DXT GPU increases raw performance by 50% over the prior CXT generation. Although ray tracing remained in the headlines, changes to other circuits are responsible for this higher throughput.
AMD Phoenix Delivers AI to Notebook PCs
AMD is addressing notebook PCs from multiple directions, fielding a mobile Ryzen that integrates an AI accelerator and a high-performance Ryzen that has up to 16 CPUs and large caches.