Where PCs were once the main driving force in the Dynamic random-access memory (DRAM) industry; now, there is a much more diversified market fuelling innovation in this space. As the ever-increasing need for more powerful devices continues to build, so, too does the availability of high-capacity processors, semiconductors, and chipsets. Smartphones, tablets, data centers, automotive applications, and increasingly the IoT, as well as high-bandwidth memory requirements for AI and machine learning, are behind record industry profits.

DRAM is forecast to experience a CAGR of 28.70% between 2018 and 2023. Manufacturing successes in Korea, Taiwan, Japan and China have positioned Asia as a prominent DRAM market.

With the DRAM market still booming, all the major DRAM players such as Samsung, SK Hynix, Micron and Nanya are eager to develop and release their next new successfully-scaled-down generation. The top 3 DRAM manufacturers have already jumped into the sub-20 nm technology node, by introducing offerings such as 1X nm in 2017 and 2018, like Samsung's 1X and 1Y LPDDR4X, DDR4 and GDDR6, and DRAM down-scaling will continue within a few years.

Given that DRAM cell TR engineering and capacitor structures offer limited capability to further scale down to 18 or 1a, major players may look to adopt new technology innovations such as pillar cell capacitors, higher-k capacitor dielectrics, dual work-function layers for buried wordline gates, lower-k dielectric spacers and air gaps.

1T-DRAM or capacitorless DRAM products with 4F2 cell design may not be seen for a while, but we will see DDR5, LPDDR5 products on the commercial market by the end of this year or early next year at the latest. HBM2 (Samsung, SK Hynix) and HMC2 (Micron) are now widely used for GPU (AMD, NVIDIA). Some new Chinese DRAM companies - including UniIC and CXMT – have introduced their products to the market, and we are excited to analyze Samsung’s GDDR6

We continue to monitor innovations in this space and adjust our roadmap of analysis that spans teardown/costing, architecture, design, process integration, functional testing, package, structure, circuit, transistor characterization, and wave form analysis.

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A successful IP strategy in this field requires an awareness of disruptive events in DRAM of economic significance, knowledge of key and upcoming market players, and the correct application of reverse engineering techniques to identify the changes from generation to generation of the latest DRAM technology.