
1. General information:
a) Description and tear down of the actual device containing the CCD;
b)Package cross section through the optical window with die intact on the substrate
e) CCD encapsulation;
f) X-ray image of the module;
g) Die markings;
h) Bond pads, CCD connections.
2. Topographical analysis of the pixel array, HCCD, and output amplifier
a) top down analysis of the color filter pattern (optical);
b) SEM top down analysis of diffusion, poly 1 and poly 2 levels, metal 1 and metal 2 levels to elucidate architecture, transistor identification, pixel size and output amplifier schematic
3. Scanning capacitance microscopy (SCM) analysis of the pixel array
to provide two-dimensional qualitative maps of doped regions in the pixel array.
a) Topographical SCM analysis of the pixel at the diffusion level.
b) Cross-sectional SCM analysis of the pixel array
4. Spreading resistance profiling (SRP) analysis of the pixel array
5. Cross-sectional analysis of the image sensor along the transfer gate, VCCD, HCCD, the color filter, and the microlenses:
a) Optical cross-section of the image sensor;
b) SEM cross-sectional analysis of the CCD array
c) TEM cross-sectional analysis along the photodiode, transfer gate, the layer structure overlying the photodiode, and the metallization structures;
d) TEM EDS analysis of materials, HAADF TEM and EELS analysis of dielectric and upper layers, color filters and microlenses along pixel-to-channel transfer direction;
e)EELS analysis of materials adjacent to the clocking gates and the photodiode
6. Process Analysis of the peripheral region (analogous to DSA) including:
a) Isolation;
b) Transistors;
c) Poly to metal dielectrics and contacts;
d) Intermetal dielectrics and vias;
e) Metallization;
f) Passivation;
g) Microlenses and color filters incl. the transition of microlenses and color filter from the periphery to pixel array.