This report presents a Memory Floorplan Analysis of the Cypress 7C15004B die, found inside the Cypress CY15V104QSN Excelon Ultra. The Cypress CY15V104QSN Excelon Ultra component combines a 4 Mbit FRAM with the high-speed quad serial peripheral interface SDR and DDR interfaces which enhances the non-volatile write capability of FRAM technology. It has a low-voltage operation, with a VDD of 1.71-1.89 V. The package is 3.24 mm × 3.27 mm × 0.47 mm thick.

This report contains the following detailed information:

• Selected teardown photographs, package photographs, package X-rays, die markings, and die photographs
• SEM cross-sectional micrographs of the general structure of the die dielectric materials, major features, and transistors
• Plan-view SEM micrograph of the die delayered to the WL and BL layers
• Measurements of vertical and horizontal dimensions of major microstructural features
• Plan-view optical micrograph of the die delayered to the polysilicon layer
• Identification of major functional blocks on a polysilicon die photograph
• Table of functional block sizes and percentage die utilization
• High-resolution top metal and polysilicon die photographs delivered in CircuitVision
• Cost of die and tested packaged die, based on the manufacturing cost analysis of the observed process