Product Code
DFR-2006-801
Release Date
Availability
Published
Product Item Code
REN-R7F0E017D2DBN
Device Manufacturer
Renesas
Device Type
Microprocessor
Subscription
Logic
Channel
Logic - Digital Floorplan (IP)
Logic - Digital Floorplan
Renesas R7F0E017D2DBN RE01 MCU 65 nm SOTB Digital Floorplan Analysis
This report presents a Digital Floorplan Analysis of the Renesas R7F0E017DM01 die found inside the Renesas R7F0E017D2DBN microcontroller. The R7F0E017D2DBN was extracted from the Casio G-Shock GBD-H1000 watch.

This report contains the following detailed information:
  • Selected teardown photographs, package photographs, package X-rays, die markings, and die photographs
  • Scanning electron microscopy (SEM) plan-view micrographs showing the layout of the die at the levels including shallow trench isolation (STI), gate, contacts, and minimum pitch metals
  • Measurements of horizontal dimensions of some of the major layout features, particularly the pitch and track height of standard cells
  • Plan-view optical micrograph of the die delayered to the metal gate level
  • Identification of major functional blocks on a gate level die photograph
  • Table of functional block sizes and percentage die utilization
  • High-resolution top metal and gate level die photographs delivered in the CircuitVision software
  • Cost of die, based on the manufacturing cost analysis of the observed process
 

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