Ventana Readies Veyron V2, Dumps V
Author: Joseph Byrne
RISC V startup Ventana is readying its second-generation Veyron processor. It’s a chiplet design like its predecessor but promises much greater performance. As with the never-completed Veyron V1, the company plans to license its design and sell chiplets integrating multiple CPUs. On SpecInt2017, the company expects a 192-core V2-based server processor to outperform the most potent Epyc Bergamo and Xeon Sapphire Rapids processors that AMD and Intel now ship.
The original CPU design remains available to license, but Ventana has scrapped plans to sell V1 chiplets. In addition to its less-potent CPU, the V1 die employed a bunch-of-wires (BoW) interface. The V2 die employs UCIe, which is emerging as the de facto chiplet interface standard. Ventana has booted Linux on the V2 design running in an emulator and expects RTL to be available for other companies to license in Q1 2024. Targeting a 4 nm process, the chiplet is scheduled to tape out in Q2 and be in production by the end of 2024.
Industry veterans CEO Balaji Baktha and CTO Greg Favor founded Ventana in 2018, an era of high demand for an alternative to x86 server processors. The company has secured $108 million in venture funding, including the most recent $55 million round that closed in August 2022.
Ventana’s primary business model is selling compute die (CD). To build a server processor, a customer must combine these with an I/O die (IOD) in a configuration like AMD’s Epyc processors. Ventana offers to license an IOD design, which an unnamed partner is building, with the intent that customers customize it. Additionally, the company licenses its CPU designs (IP) for use in other companies’ SoCs; it is also collaborating with Imagination Technologies to help these customers use Ventana’s CPUs and Imagination’s GPUs together.
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