Last year, Samsung announced the introduction of EUV into their 7LPP process used in the Exynos 9825. Through analysis of the part, we found little difference between their 7LPP process in the 9825 and their 8LPP process in the Exynos 9820.
Now, we are excited to say that we have found Samsung’s true 7LPP process in the Exynos 990, included in their flagship Galaxy S20. This 7nm EUV process delivers, as we expected, Samsung’s highest density layout observed to date.
With a 27nm fin pitch, this disruptive innovation enables a smaller standard cell height of 268nm while maintaining high drive current with a 3/3-fin layout for both NMOS and PMOS transistors.
This shows the increased density achieved with EUV lithography implementation compared to TSMC’s N7 7.5T 3/3-fin layout having a 300nm standard cell height, and 6T 2-fin layout at 240nm standard cell height.
Intel’s 10nm process has a similar 272nm standard cell height, but achieved this with 2/3 fin layout. In addition to pitch scaling, in a surprise implementation, Samsung has introduced a SDB (Single Diffusion Break) that reduces the transistor isolation distance required, This was originally announced to be deployed in their 6LPP technology.
TechInsights will be examining this part more closely; so far, we have the following analysis planned:
Samsung Exynos 990 7nm EUV Process Analysis
Learn more about Samsung's true 7LPP process in the Samsung Exynos 990 and the analysis we have in progress