Scaling Turns Into More-Than-Moore

Author: Dick James

 
 
 
Scaling Turns Into More-Than-Moore
 

The semiconductor industry owes its continued existence to the unrelenting drive to scale ever further, both in dimensions and performance—as dimensions shrink, performance increases. It amazes most people that the technology that took Apollo to the moon is a fragment of what is in today’s simplest mobile phone.

New materials and techniques are being introduced to maintain the continued evolution of power, performance, area, and cost expected of the semiconductor industry. Physical limitations have ended the simple relationship between transistor size and performance established at the industry’s start. Devices are now at the atomic scale, resulting in loss of gate control leading to increased leakage and power losses and forcing changes to transistor structures and design paradigms to compensate.

The integrated circuit business is now 60-plus years old, and it is possible to look back and see the eras of scaling. Fairchild and Intel cofounder Gordon Moore first observed the link between technological and economic scaling, leading others to dub it Moore’s Law. Bob Dennard subsequently quantified the relationship between semiconductor parameters, establishing what became known as Dennard scaling.

In the first semiconductor era, new technology nodes regularly gave 30% reductions in the linear dimensions that could be reliably manufactured on a silicon wafer. This doubled chips’ transistor density, which resulted in a 20%–30% annual decline in per-transistor cost.

When physical limitations ended Dennard scaling, a second semiconductor era began. New materials and physical phenomena, such as high-k metal-gate (HKMG) transistors and channel stress, combined with continued reduction of horizontal dimensions, and the introduction of FinFETs and GAAFETs sustained Moore’s Law into the current decade.

The industry is now on the cusp of a third era. Heterogeneous integration of chiplets into 3D system-level packages and vertical stacking of transistors will enable further density increases and power control as we progress into the 21st century.

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