Memory Technology Roadmap Update: Q2 2024 - Focus on 3D NAND


In Q2 2024, significant advancements have been made in 3D NAND technology by key industry players. Samsung transitioned to a double-deck structure with a 2D array-periphery design for their V7 and released V9 with 286 layers, featuring COP integration. They also introduced a 133-layer V6 Prime for the 990 EVO, enhancing speed to 1,600 MT/s. Samsung's upcoming V10 will adopt hybrid bonding technology.

Discover the latest advancements in 3D NAND technology with our Q2 2024 Memory Technology Roadmap update. Learn about Samsung, KIOXIA, Micron, SK hynix, and YMTC's newest innovations and upcoming products.

KIOXIA and Western Digital continue with their BiCS structure, recently advancing to a 162-layer BiCS 6. They plan to skip BiCS 7, moving to an 8th generation with 218 layers and possibly a 284-layer version. Micron shifted to CTF CuA integration with their 128-layer products and has since released 176-layer and 232-layer versions. They are now developing a Gen7 under 300 layers and may leap to 4xx layers.

SK hynix's 4D PUC structure continues with 176-layer and 238-layer products, anticipating a 321-layer V9 next year, followed by 3yy-layer devices. YMTC, using Xtacking technology, skipped intermediate layers to release a 232-layer product and plans a Gen5 with over 300 layers. Due to US trade restrictions, YMTC focuses on expanding their 128-layer and 232-layer QLC offerings while developing multi-Xtacking technology.

MXIC entered the market with a 48-layer chip used in the Nintendo Switch and is now developing a 96-layer second generation. In the next few years, we may see 3D NAND products exceeding 500 layers, with advancements in hybrid bonding technology and hafnia ferroelectrics. This year, expect the release of 2xx and 2yy-layered 3D NAND volume products, heralding the next generation of memory solutions.

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