Hybrid Bonding Technology
- 2023 and beyond
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Recently, TechInsights hosted a webinar where several experts from our Logic, Image Sensor, Memory, and Engineering teams reviewed applications of hybrid bonding technology and discussed what’s to come in 2023 and beyond.
Hybrid bonding technology is rapidly becoming a standard approach in chipmaking due to its ability to increase connection densities. The back end of line (BEOL) is the part of chip fabrication where individual devices (resistors, capacitors, transistors, etc.) are wired to the wafer. Advancements in far-BEOL interconnect technologies have continued to increase connection densities over the past decade. Further improvements will be enabled through hybrid bonding.
TechInsights’ Yuzo Fukuzaki, Alain Gauthier, and Eugene Hsu from the Advanced Logic team discussed how chip-on-wafer (CoW) hybrid bonding technology was first seen in the AMD Ryzen 7. They covered how stacking memory directly with the processor greatly increases available cache memory and how hybrid bonding is a milestone for system-technology co-optimization (heterogeneous 3D scaling) described in the International Roadmap for Devices and Systems (IRDS) More Moore roadmap.
Ziad Shukri, Wilson Machado, and Eric Rutulis, our Image Sensors subject-matter experts, observed that we have seen wafer-to-wafer (W2W) stacking since 2016 from Sony, that bond pitches as small as 2.2 µm are common, and the trend points to pitches as small as 1.4 μm. They also explained how direct bond interconnect will ultimately enable a digital pixel with in-pixel ADC and stacking of three or more wafers.
Lastly, Jeongdong Choe and Chi Lim Tan, our Memory experts, explained how hybrid bonding is often used in high bandwidth memory (HBM) and 3D Xtacking applications. Further scaling, greater cost effectiveness, fewer defects, and solutions to thermal issues are still required, but they stressed that Hybrid bonding will be one of most important high-density memory enablers.