Gate-All-Around Cranks Up Logic Speed

Nanosheet transistors are superior to FinFETs for logic transistors, offering an adjustable gate width, superior electrostatic characteristics, and better channel-thickness uniformity as well as faster switching speed. They have drawbacks for SRAM and I/O transistors, however.
Dick James

To achieve power performance area improvements in MOSFET technology, transistor innovations have been driven by short channel effects (SCEs) resulting from device scaling. SCEs occur when the channel length shrinks to similar dimensions as the source/drain depletion layers. Interim solutions such as channel strain and high-k metal gates allowed planar transistors to scale to the 28 nm node.

FinFET technology enabled further scaling by introducing trigate control, although that has also reached its limits. Drive current increased by raising fin height, but fins that are too tall and thin are not mechanically stable. Gate lengths cannot shrink further without SCEs compromising control of the channel, and the smallest transistors have slimmed down to a single fin. Transistor development must continue scaling in a new direction.

The next logical step is gate-all-around (GAA) technology. Whereas FinFETs control the channel on three sides, GAA controls it on all sides, as Figure 1 shows. The industry has explored different GAA structures; while nanowires provide the best SCE control, wider “nanosheets” give higher On current with better electrostatic control than FinFETs.

We are now in the fifth era of MOS transistor structures. The industry started with metal-gate MOS, moved to polysilicon gate, then high-k metal gate, FinFET, and now GAAFET.

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