Editorial: MCUs Moving to RISC-V

Renesas has introduced the first embedded processor with a user-programmable RISC-V CPU. Chinese processors are already adopting RISC-V; more will follow in a direct challenge to Arm.
Bryon Moyer
Bryon Moyer

The new RZ/Five processor from Renesas is RISC-V’s first appearance as the primary user-programmable CPU in a general-purpose chip from a mainstream provider. Although technically a microprocessor (MPU), the boundary between MPUs and microcontrollers (MCUs) continues to blur. I expect a growing trend as the RISC-V instruction-set architecture (ISA) drives more user CPUs and drifts down from MPUs into the MCU realm.

For established processor vendors, MCUs based on the open-source RISC-V ISA represent a modest investment that has multiple possible returns. And unlike Arm, the RISC-V instruction set isn’t subject to export restrictions, making it of particular interest in the China market. Although Arm is far from jeopardy, the embedded-CPU calculus is changing.

The RZ/Five features a single Andes AX45MP CPU with a SIMD block and a floating-point unit running at up to 1.0GHz, keeping it in the MPU domain. But it also has analog inputs and numerous I/Os—to the point where it looks like a fast high-end microcontroller that lacks only nonvolatile memory. Downsize the CPU, move to a slower process, and add flash memory, and you have a traditional MCU.

Although RISC-V has shipped in billions of processors, the ISA has thus far served primarily in deeply embedded management cores that aren’t programmable by, or even visible to, the chip’s customer. But that situation could change if a few carefully placed bets pay off.

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