Blue Cheetah Connects Chiplets
Proprietary technology helps startup Blue Cheetah rapidly create custom die-to-die interconnects, including analog circuits, to attach chiplets. Focusing on the BoW standard, the company supports two fab processes.
Whether chiplet designers choose a standard interconnect or go their own way, they still must implement it. On-chip-interconnect designers will find that their usual technique of simply employing a large inverter is insufficient for traversing a substrate. Those from the off-chip realm will find serdes too big and hot. Fortunately, building a chiplet interconnect isn’t the only option; chipmakers can also order one to size. Startup Blue Cheetah Analog Design offers semiconductor intellectual property (IP) tailored to customers’ interface requirements using an automated process it presented at the recent Linley Fall Processor Conference.
The startup combines analog-circuit expertise with software for generating interfaces. Its expertise yields designs with advantageous performance, power, and area, while the generator serves internally to reduce the time to finish the custom blocks. Initial customers received the company’s first interface IP, branded BlueLynx, in January. Blue Cheetah currently supports two FinFET processes and plans to add two more by mid-2023.
Having closed a $24 million Series B round in April, the Silicon Valley company focuses on in-package parallel interfaces. In particular, it targets the Bunch of Wires (BoW) approach championed by the Open Domain-Specific Architecture (ODSA) group (part of OCP). Compared with serdes, parallel links are simpler, and they reduce latency and power. In the absence of a multivendor market for interoperable chiplets, Blue Cheetah’s custom interfaces will serve on both sides of a link, eliminating compatibility concerns.
One advantage of buying interface technology instead of developing it in house, particularly for digital-design teams without full-time analog engineers, is the potential to obtain better technology. Better performing transceivers, for example, can drive longer connections, relaxing chiplet-placement constraints. As vendors employ chiplets to scale their creations, interface design will become more and more important.