Agilex 5 Floods FPGA Midrange
Intel has refreshed its midrange FPGAs, challenging market newcomers. The new family updates the fabric, CPUs, and DSPs while expanding the Agilex line.
An aging midrange-FPGA market tempted new players to join, but Intel has complicated their prospects by refreshing its lineup. It added numerous models in a new Agilex 5 family ranging from just over 50,000 to 650,000 logic cells (LCs); all except two include CPU subsystems.
The new family adds registers to the FPGA fabric interconnect, upgrades the CPU subsystem, supplements DSPs with tensor blocks for AI, and updates the DRAM and I/O protocols. “Agilex” appears to be supplanting older Intel FPGA brands.
Microprocessor Report defines the midrange as roughly 50,000–500,000 LCs, allowing for the fact that LCs differ by architecture. Perceived inattention to this space in favor of the high-dollar data-center market tempted Lattice to move up in density and enabled funding for startup Rapid Silicon. The myriad refreshed Agilex 5 models outnumber the few from those companies; the midrange market is now crowded.
Scheduled for 2024 production, Intel’s new devices come in two types: the D series, which prioritizes performance, and the E series, which has a power and capacity focus. The latter has two subsets: models in the “A” group have higher clock and interface speeds, and those in the “B” group ease that performance in favor of power.
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