Published: 30 May 2014

 

This report is a detailed structural analysis (MDSA) of the 21 nm node LPDDR3 DRAM found in the H9TQ18ABJTMC multi-chip memory package. The report contains SEM and TEM cross-sectional images of the metallization, dielectrics, transistors and memory cell; layer-by-layer SEM plan view images of the DRAM array, TEM-EDS and EELS materials analyses, and SRP analysis of the peripheral and array wells. The LPDDR3 DRAM is fabricated using a 4 metal (Al, Cu, W), tungsten word line, 21 nm DRAM process. The device features polysilicon peripheral transistors having a multilayer metal/silicide on polysilicon gate structure. The DRAM array features tungsten/TiN buried word lines, 65 nm word line and bitline pitches, a 21 nm half-pitch STI and 0.0043 µm2 cell size. The reported results are derived from scanning electron microscope (SEM), transmission electron microscope (TEM), energy dispersive X-ray spectroscopy (TEM-EDS), electron energy loss spectroscopy (TEM-EELS) and spreading resistance profiling (SRP).

Recent OMR Reports

Report  |  1016-43837-O-6CV-100  |   Published: 31 March 2017
This CircuitVision report provides a set of hierarchical schematics for the Intel 5750 RF Transceiver. The circuit blocks extracted and analyzed for the report include the Transmit Path, Dual-Channel Receive...
Report  |  1016-44043-O-5CV-100  |   Published: 27 January 2017
This CircuitVision report provides a set of hierarchical schematics for the Toshiba THGBX6T1T82LFXF 3D NAND Flash. The circuit blocks extracted and analyzed for the report include the memory access (Memory...
Report  |  0516-00000-O-3DL-100  |   Published: 30 December 2016
The DesignLook report provides an overview of a semiconductor device and features a die floorplan along with details of the process and package. The report includes photographs of the package, die and...