This report is a detailed structural analysis (MDSA) of the Intel(R) eDRAM embedded in the Intel GT3e graphics processing unit (GPU) used by the Haswell G82494 processor. The integrated graphics unit comes in several flavors, the low-end GT1, mid-range GT2, and high-end GT3. The highest performance version though is the GT3e embedded in the GPU IC.
The GT3e is fabricated using nine levels of metallization, 22 nm Tri-Gate transistor technology with embedded DRAM. Silicon source/drain regions are used for the NMOS transistors and SiGe for the PMOS transistors. The embedded DRAM capacitors (0.029 µm2 cell size) are formed in trenches patterned through the ILD dielectrics supporting the metal 3 and metal 4 interconnects. The capacitor trench bottoms are supported by the via 1/metal 2 Ta-based barrier layer. FinFET transistors are used for the eDRAM access transistors having a 107 nm wordline pitch.
The reported results are derived from scanning electron microscope (SEM), transmission electron microscope (TEM), energy dispersive X-ray spectroscopy (TEM-EDS), electron energy loss spectroscopy (TEM-EELS) and spreading resistance profiling (SRP).