IC Design Overview of the Samsung Exynos 5 Octa (5420)

Published: 15 January 2014

The following IC Design Overview contains a summary of packaging details and a breakdown of logic, I/O and embedded memory areas for this device. Included in this analysis are images of the package, die and die markings. Package analysis includes a summary of package measurements, external top and bottom images, a package cross-section image, and multiple package x-ray images. A die cross-section image is included to show die thickness. Annotated die images show locations of I/O, embedded memory, standard logic, and major repeating mixed-signal blocks. Representative images of I/O blocks, embedded memory types, and standard logic gates are also included. This report also comes with 30 minutes of analyst time that is to be used within 6 months of the report’s purchase.

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